25 Gigabit Ethernet Consortium Offers Low Latency Specification For 50gbe, 100gbe And 200gbe Hpc, Financial And Other Performance-critical Networks

February 19, 2019

25 Gigabit Ethernet Consortium Offers Low Latency Specification for 50GbE, 100GbE and 200GbE HPC, Financial and Other Performance-Critical Networks

New forward error correction (FEC) specification lowers total physical layer latency for engineered network links

SANTA CLARA, Calif – Feb. 19, 2019 – The 25 Gigabit Ethernet Consortium, established to develop 25 Gbps and faster Ethernet specifications, today announced the availability of a low-latency forward error correction (FEC) specification for 50 Gbps, 100 Gbps and 200 Gbps Ethernet networks.

High latency is a problem for performance-critical networks in applications such as high-performance computing (HPC), data center interconnect, machine learning, financial trading and others. The availability of a low-latency FEC allows high-speed Ethernet to be better suited for these applications, especially for HPC networks where other interconnect technologies are more prominent than Ethernet.

“Five years ago, only HPC developers cared about low latency, but today latency sensitivity has come to many more mainstream applications,” said Rob Stone, technical working group chair of the 25G Ethernet Consortium. “With this new specification, the consortium is improving the single largest source of packet processing latency, which improves the performance that high-speed Ethernet brings to these applications.”

FEC is a major source of latency in a switched network and the new specification cuts FEC latency approximately in half. This will have a significant impact on overall physical layer latency, in particular for hyperscale datacenter networks comprised of a large number of nodes, with multiple hops between servers.

The specification allows NEMs to optionally use a shortened codeword FEC variant – RS (272, 257+1, 7, 10) that replaces the IEEE 802.3cd and 802.3bs standard FEC.

The shortened codeword contains 272 x 10-bit symbols rather than the 544 x 10-bit symbols originally specified. Nothing else changes in the symbol distribution process from the output of the encoder to the FEC lanes in the new FEC, but that process is implemented more quickly due to the shortened codeword.

“The value of having a standard extends to ensuring multi-vendor product interoperability and ecosystem,” said Tim Lustig, marketing chair of the 25G Ethernet Consortium. “To ensure specification conformance and interoperability, testing will be held at future plugfests the consortium regularly conducts at the University of New Hampshire InterOperability Laboratory (UNH-IOL).”

The original FEC standards are designed to maximize data integrity and minimize data packet retransmissions due to packets or data that are lost or corrupted in transmission.  In simulations conducted by the consortium using the new FEC standard, copper cable lengths of up to 2m and fiber cable lengths up to 30m can be supported. To ensure high data integrity, the consortium recommends that the new FEC be used only on engineered data connections.


The specification is now available for implementation by switch chip manufacturers. The specification is available at https://ethernettechnologyconsortium.org/wp-content/uploads/2020/03/LL-FEC-Specification-1.0-25G-Consortium.pdf

About the 25 Gigabit Ethernet Consortium

The 25 Gigabit Ethernet Consortium is an open organization of third-party companies who wish to enable the transmission of Ethernet frames at 25 or 50 Gigabit per second (Gbps) and to promote the standardization and improvement of the interfaces for applicable products. The consortium is open for membership to any organization willing to help facilitate industry adoption. To become a member, please visit http://www.25gethernet.org/.